GaN-based CMOS circuits make power integrated systems more efficient

已发布 16 二月, 2022

In recent years, gallium nitride (GaN) has emerged as a compelling candidate to complement the silicon material used in wireless communication and power conversion applications. Benefits of GaN devices include their compact size, higher power density and efficiency, and improved thermal management. This has resulted in them being widely used in 5G wireless base stations and ultra-compact fast chargers for mobile devices. Many predict that they will soon be powering systems for data centers, autonomous driving, electric vehicles, drones and robots.

However, to fully unlock the potential of GaN in power conversion applications, a versatile yet robust technology platform that integrates power switches and peripheral functional blocks is required.

Complementary logic integrated circuits, also known as CMOS IC, are some of the highest performing logic circuits and offer a promising pathway to meeting those goals. Prof. Kevin J. Chen’s team at The Hong Kong University of Science and Technology (HKUST) have developed a series of high-performance, GaN-based CMOS logic circuits, which all display the desired “CMOS-like” characteristics. In their paper, published in the KeAi journal Fundamental Research, they describe how these circuits could have the potential to cut the power consumption of the logic control unit in conversion power systems by 20-30%.

Prof. Chen explains: “We analysed the theoretical speed limit and energy efficiency of GaN CMOS technology, based on the material properties of GaN and the readily available fabrication techniques on 8-inch lines. We found that the single-stage logic gate delay, even with a relatively pessimistic estimation, can be shorter than 1 nanosecond through process optimisation and device down-scaling for GaN CMOS circuits on commercial platforms.”

He adds: “Although this is still slower than the state-of-the-art, high-speed CMOS circuits, it comfortably meets the requirements of GaN-based power conversion systems, whose operating frequency generally does not exceed 10 MHz.”

Prof. Chen concludes: “With GaN-based CMOS circuits implementing peripheral circuits such as controller, driver and miscellaneous sensors, the power dissipation of logic blocks can be substantially reduced by more than 3 orders of magnitude. As a result, the overall power consumption of the logic control unit in power system can be reduced by 20-30%. Downscaling and gate stack engineering of p-FETs are expected to further improve the performance and accelerate the commercialisation pace of GaN CMOS logic circuit technology.”

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Contact the authors: Prof. Kevin J. Chen, eekjchen@ust.hk | Dr. Zheyang Zheng zzhengah@connect.ust.hk

COMPARISON OF CMOS LOGIC CIRCUITS WITH PURE N-CHANNEL LOGIC CIRCUITS SUCH AS DCFL TOPOLOGIES
COMPARISON OF CMOS LOGIC CIRCUITS WITH PURE N-CHANNEL LOGIC CIRCUITS SUCH AS DCFL TOPOLOGIES

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